There are a variety of standards for integrated circuit (IC) cards that can be mounted on mobile devices such as notebook personal computers (PC), personal digital assistants (PDA), digital video devices, digital cameras, and portable audio devices. These mobile devices will be referred to collectively as “host devices.” Recently, SD memory cards have been attracting attention because of their small size, high data transfer rates, and enhanced security features. For the purposes of this disclosure, the abbreviation “SD” stands for “secure digital,” and various devices and their components related to this secure digital technology may be identified by the abbreviation “SD.”
At present, there are two international standards for SD-related devices: (1) the SD memory standard for memory devices and, (2) the SDIO standard for input/output (I/O) devices. The SDIO standard is an extension of the SD memory card standard and covers input/output (I/O) functions as well as memory functions. Card-shaped peripherals compliant with the SDIO standard are referred to as “SDIO cards.” In order to develop or engineer an SDIO card, it is necessary to understand much of the SD and SDIO standards, to prepare appropriately designed environments, and to examine test environments and processes before tackling the solving of various problems including interface application issues.
An SDIO controller in accordance with the present invention is defined as a controller that implements functions needed for peripherals to comply with the SDIO standard and to connect to SDIO host devices. Those skilled in the art know that SDIO is a relatively new standard in industry technology. In view of this fact, future research and development must be conducted in such a way as to meet the specifications of the SDIO international standard. Because SDIO is a newly emerging technology, environments for SDIO-related design and development are not yet in place. Thus, certain necessary hardware devices for SD interfaces and associated software await development. For example, SDIO protocol engines, which would be SDIO compatible host interface modules (abbreviated as “SDIO HIM”) for providing communication interfaces between SDIO compatible peripherals and SDIO host devices, and the associated software, have not yet been developed.
Consequently, in order to construct new SDIO systems, engineers must determine whether various SDIO peripheral application devices, such as SD memory cards, SD wireless cards, global positioning systems (GPS), etc., will operate properly on certain pre-existing consumer host systems (e.g., digital video cameras, etc.) undergoing SDIO modification when mounting an SDIO-compatible host controller chip on such pre-existing consumer host systems to make them compatible with SDIO peripherals. More specifically, device driver software for the host systems needs to be developed, and the SDIO modified host systems must be systematically verified for compliance with the SDIO standard, and so on.
On the other hand, engineers of SDIO application devices (i.e., SD memory cards, SD wireless cards, GPS, other types of wireless communication peripherals, etc.) must determine whether newly engineered SDIO cards operate properly for various SDIO host devices. In this case, development of these SDIO application devices themselves, and their corresponding device driver software, is indispensable.
In view of the above SDIO technology development problems, a major object in accordance with the present invention is to improve the design and development environments for SDIO-related devices so as to facilitate the future engineering of SDIO-compatible devices. Another object in accordance with the present invention is to provide a development tool that can reduce burdens on development engineers in various technological fields, which can speed up the development time of SDIO card development systems and make such systems more efficient. Another object in accordance with the present invention is to provide a development tool for SDIO technology that facilitates development and engineering of SDIO-compatible devices through the use of more efficient design and development environments.